[all-commits] [llvm/llvm-project] 045385: [clang] Mention vector in the description for -mno...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0453857d740248a8991ac28981784445dffa8dee
      https://github.com/llvm/llvm-project/commit/0453857d740248a8991ac28981784445dffa8dee
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M clang/include/clang/Driver/Options.td

  Log Message:
  -----------
  [clang] Mention vector in the description for -mno-implict-float.

As far as I understand, this disables all integer vectors too.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D134089


  Commit: 5e3df94a1798a756a6bbe31a4c4f1f4009990c15
      https://github.com/llvm/llvm-project/commit/5e3df94a1798a756a6bbe31a4c4f1f4009990c15
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

  Log Message:
  -----------
  [RISCV] Rework hasAllWUsers in RISCVSExtWRemoval. NFCI

Instead of storing the uses to check in the worklist, store the
instruction we want to check uses for.

Now we pop and instruction from the worklist, loop over its uses
and check them. If it's something we need to look across, we'll push
it to the worklist.

By doing it this way, we can have access to which operand
of the user is using the instruction. This will allow supporting
store instructions since we'll be able to disambiguate the the value
operand and the pointer operand. We can also improve support for
*add.uw instructions and shift amount uses.

Reviewed By: mohammed-nurulhoque, asb

Differential Revision: https://reviews.llvm.org/D137446


  Commit: 7f018b45f937afcdff2acaa5cfa05825ddbeb1b7
      https://github.com/llvm/llvm-project/commit/7f018b45f937afcdff2acaa5cfa05825ddbeb1b7
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp
    M llvm/test/CodeGen/RISCV/sextw-removal.ll

  Log Message:
  -----------
  [RISCV] Support SB/SH/SW in hasAllWUsers in RISCVSExtWRemoval.

After D137446 we can see which operand is the user. If the user
is the value operand of a SB/SH/SW then the upper 32 bits aren't
used.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D137448


  Commit: bc6df5737fda2ac5cea4beb11d95b95081fadcd4
      https://github.com/llvm/llvm-project/commit/bc6df5737fda2ac5cea4beb11d95b95081fadcd4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

  Log Message:
  -----------
  [RISCV] Improve support for ADD_UW/SHXADD_UW in hasAllWUsers.

The first use operand of these is implicitly zero extended. We
can consider that a W read. If the use is the other operand, we
need to look through the instruction.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D137449


  Commit: 902976a379c437de844601341a6329236932d19e
      https://github.com/llvm/llvm-project/commit/902976a379c437de844601341a6329236932d19e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

  Log Message:
  -----------
  [RISCV] Support shift/rotate amount operands in isAllUsesReadW.

These operands use 6 bits.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D137450


  Commit: 0b01aebf5e658f3a9c026b194e7d60c0aa7066de
      https://github.com/llvm/llvm-project/commit/0b01aebf5e658f3a9c026b194e7d60c0aa7066de
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-11-09 (Wed, 09 Nov 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSExtWRemoval.cpp

  Log Message:
  -----------
  [RISCV] Support BSET/BCLR/BINV in hasAllWUsers.

These instructions set, clear, or invert a single bit. If their
users don't use the upper 32 bits, they don't use the upper 32 bits
of their input.

Additionally the second operand BSET/BCLR/BINV is a shift amount
which only uses 6 bits of the source.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D137452


Compare: https://github.com/llvm/llvm-project/compare/c92ddf4e2359...0b01aebf5e65