[all-commits] [llvm/llvm-project] df8e0c: [SVE] Extend getMemVTFromNode to cover the sret va...

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: df8e0ce59248822029aa8deafb8e6ff5a5eb5424
      https://github.com/llvm/llvm-project/commit/df8e0ce59248822029aa8deafb8e6ff5a5eb5424
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-11-08 (Tue, 08 Nov 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll

  Log Message:
  -----------
  [SVE] Extend getMemVTFromNode to cover the sret variants of sve.ld2/3/4.

This enables the use of reg+imm addressing modes to match the
non-sret variants of these intrinsics.

Differential Revision: https://reviews.llvm.org/D132392