[all-commits] [llvm/llvm-project] d91727: [AArch64]SME2 Single and Multi vector Shift and M...

CarolineConcatto via All-commits all-commits at lists.llvm.org
Tue Nov 8 04:33:25 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d917276cd8e8311df2c11a9263f4dfb760be769f
      https://github.com/llvm/llvm-project/commit/d917276cd8e8311df2c11a9263f4dfb760be769f
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-11-08 (Tue, 08 Nov 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/MC/AArch64/SME2/sqrshr-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqrshr.s
    A llvm/test/MC/AArch64/SME2/sqrshrn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqrshrn.s
    A llvm/test/MC/AArch64/SME2/sqrshru-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqrshru.s
    A llvm/test/MC/AArch64/SME2/sqrshrun-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqrshrun.s
    A llvm/test/MC/AArch64/SME2/uqrshr-diagnostics.s
    A llvm/test/MC/AArch64/SME2/uqrshr.s
    A llvm/test/MC/AArch64/SME2/uqrshrn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/uqrshrn.s

  Log Message:
  -----------
  [AArch64]SME2 Single and Multi vector  Shift and Multiply instructions

This patch adds the assembly/disassembly for the following instructions:

  SQRSHR (four registers): Multi-vector signed saturating rounding shift right narrow by immediate.
         (two registers): Multi-vector signed saturating rounding shift right narrow by immediate.
  SQRSHRN: Multi-vector signed saturating rounding shift right narrow by immediate and interleave.
  SQRSHRU (four registers): Multi-vector signed saturating rounding shift right unsigned narrow by immediate.
          (two registers): Multi-vector signed saturating rounding shift right unsigned narrow by immediate.
  SQRSHRUN: Multi-vector signed saturating rounding shift right unsigned narrow by immediate and interleave.
  UQRSHR (four registers): Multi-vector unsigned saturating rounding shift right narrow by immediate
         (two registers): Multi-vector unsigned saturating rounding shift right narrow by immediate.
  UQRSHRN: Multi-vector unsigned saturating rounding shift right narrow by immediate and interleave.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D136150




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