[all-commits] [llvm/llvm-project] 1a9175: [AArch64]SME2 MOV Instructions

CarolineConcatto via All-commits all-commits at lists.llvm.org
Tue Nov 8 01:54:32 PST 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1a917568e7321b4cc36313895cc98408ffa861ec
      https://github.com/llvm/llvm-project/commit/1a917568e7321b4cc36313895cc98408ffa861ec
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-11-08 (Tue, 08 Nov 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/MC/AArch64/SME2/mova-diagnostics.s
    A llvm/test/MC/AArch64/SME2/mova.s

  Log Message:
  -----------
  [AArch64]SME2 MOV Instructions

This patch adds the assembly/disassembly for the following instructions:

MOVA (array to vector, four registers): Move four ZA single-vector groups to four vector registers.
     (array to vector, two registers): Move two ZA single-vector groups to two vector registers.
     (tile to vector, four registers): Move four ZA tile slices to four vector registers.
     (tile to vector, single): Move ZA tile slice to vector register.
     (tile to vector, two registers): Move two ZA tile slices to two vector registers.
     (vector to array, four registers): Move four vector registers to four ZA single-vector groups.
     (vector to array, two registers): Move two vector registers to two ZA single-vector groups.
     (vector to tile, four registers): Move four vector registers to four ZA tile slices.
     (vector to tile, single): Move vector register to ZA tile slice.
     (vector to tile, two registers): Move two vector registers to two ZA tile slices.

The reference can be found here:

https://developer.arm.com/documentation/ddi0602/2022-09

It add more sizes for Matrix Operand:
MatrixOp8 and MatrixOp16
two implicit operands uimm0s2range and uimm0s4range.
and  uimm1s2range that are immediates

Differential Revision: https://reviews.llvm.org/D136142




More information about the All-commits mailing list