[all-commits] [llvm/llvm-project] d3c8aa: [AArch64]SME2 Multi-vector-Multiple Vectors SQDMUL...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d3c8aa7a43a9a58403750584fa9694cf97ceb063
      https://github.com/llvm/llvm-project/commit/d3c8aa7a43a9a58403750584fa9694cf97ceb063
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-10-21 (Fri, 21 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    M llvm/test/MC/AArch64/SME2/sqdmulh-diagnostics.s
    M llvm/test/MC/AArch64/SME2/sqdmulh.s

  Log Message:
  -----------
  [AArch64]SME2 Multi-vector-Multiple Vectors SQDMULH instructions

 This patch adds the assembly/disassembly for the following instruction:
  SQDMULH (multiple vectors): Multi-vector signed saturating doubling multiply high.
For 2 and 4 ZA registers

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09/SME-Instructions/SQDMULH--multiple-vectors---Multi-vector-signed-saturating-doubling-multiply-high-?lang=en

Depends on: D135563

Differential Revision: https://reviews.llvm.org/D135575