[all-commits] [llvm/llvm-project] 830b5e: [AArch64]SME2 multi-vec FP/INT down convert 2/4 r...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 830b5e823af00dfca2de361019bfeb98846bca06
      https://github.com/llvm/llvm-project/commit/830b5e823af00dfca2de361019bfeb98846bca06
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-10-21 (Fri, 21 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/MC/AArch64/SME2/bfcvt-diagnostics.s
    A llvm/test/MC/AArch64/SME2/bfcvt.s
    A llvm/test/MC/AArch64/SME2/bfcvtn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/bfcvtn.s
    A llvm/test/MC/AArch64/SME2/fcvt-diagnostics.s
    A llvm/test/MC/AArch64/SME2/fcvt.s
    A llvm/test/MC/AArch64/SME2/fcvtn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/fcvtn.s
    A llvm/test/MC/AArch64/SME2/sqcvt-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqcvt.s
    A llvm/test/MC/AArch64/SME2/sqcvtn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqcvtn.s
    A llvm/test/MC/AArch64/SME2/sqcvtu-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqcvtu.s
    A llvm/test/MC/AArch64/SME2/sqcvtun-diagnostics.s
    A llvm/test/MC/AArch64/SME2/sqcvtun.s
    A llvm/test/MC/AArch64/SME2/uqcvt-diagnostics.s
    A llvm/test/MC/AArch64/SME2/uqcvt.s
    A llvm/test/MC/AArch64/SME2/uqcvtn-diagnostics.s
    A llvm/test/MC/AArch64/SME2/uqcvtn.s

  Log Message:
  -----------
  [AArch64]SME2 multi-vec FP/INT  down convert 2/4 registers

This patch implements
Int:
  SQCVT: Multi-vector signed saturating extract narrow for 2 and 4 registers.
  UQCVT: Multi-vector unsigned saturating extract narrow for 2 and 4 registers.
  SQCVTU: Multi-vector signed saturating unsigned extract narrow for 2 and 4 registers
  SQCVTN:  Multi-vector signed saturating extract narrow and interleave.
  SQCVTUN: Multi-vector signed saturating unsigned extract narrow and interleave.
  UQCVTN: Multi-vector unsigned saturating extract narrow and interleave.

FP:
  FCVT(narrowing): Multi-vector floating-point convert from single-precision to
                  packed half-precision.
  FCVTN: Multi-vector floating-point convert from single-precision to
           interleaved half-precision.
  BFCVT: Multi-vector floating-point convert from single-precision to packed
         BFloat16 format.
  BFCVTN: : Multi-vector floating-point convert from single-precision to
            interleaved BFloat16 format.

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09

Depends on: D135563

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D135588