[all-commits] [llvm/llvm-project] 42230e: [DAG] Fold (sra (or (shl x, c1), (shl y, c2)), c1)...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 42230efccf8fe1185be5fa6c23dce0a8183d6ec9
      https://github.com/llvm/llvm-project/commit/42230efccf8fe1185be5fa6c23dce0a8183d6ec9
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-19 (Wed, 19 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll

  Log Message:
  -----------
  [DAG] Fold (sra (or (shl x, c1), (shl y, c2)), c1) -> (sext_inreg (or x, (shl y,c2-c1)) iff c2 >= c1

Helps with some of the AMDGPU regressions identified in D136042 where we were losing signed BFE patterns after sinking shifts behind logic ops.

Differential Revision: https://reviews.llvm.org/D136081