[all-commits] [llvm/llvm-project] df9d60: [PowerPC] handle more than two predecessors loop h...

[Chen Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: df9d60af1f9fa44f411b656bbc691d950c6fc087
      https://github.com/llvm/llvm-project/commit/df9d60af1f9fa44f411b656bbc691d950c6fc087
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2022-10-19 (Wed, 19 Oct 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
    A llvm/test/CodeGen/PowerPC/ctrloop-header-multiple-preds.mir

  Log Message:
  -----------
  [PowerPC] handle more than two predecessors loop header in ctrloop pass

After ISEL, the "valid" loop header which has two predecessors
(one is preheader and the other one is latch) may be transformed
to have more than two predecessors by some optimizations, like tail
duplicator, if the old header's successor(will be changed to new
header) is a sub loop.

The predecessors of the new loop header are preheader, loop latch
and the loop latch(es) of the sub loop(old header's successor).

Before the patch, ctrloop pass assumes two predecessors for candidate
loop header. This patch fixes this case.

Reviewed By: lkail

Differential Revision: https://reviews.llvm.org/D135846