[all-commits] [llvm/llvm-project] ec1747: Able to produce good initial SelectionDAG for ret....

[Jeffrey Byrnes via All-commits]

  Branch: refs/heads/v4i8
  Home:   https://github.com/llvm/llvm-project
  Commit: ec1747cb71d0db73b268d17367b83652cd4e2ad3
      https://github.com/llvm/llvm-project/commit/ec1747cb71d0db73b268d17367b83652cd4e2ad3
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-13 (Thu, 13 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td

  Log Message:
  -----------
  Able to produce good initial SelectionDAG for ret. resolved extract_subvector legalizing, able to build the test.ll


  Commit: e0fb937455d9339a286f82fc2a2a9c38a0370831
      https://github.com/llvm/llvm-project/commit/e0fb937455d9339a286f82fc2a2a9c38a0370831
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-13 (Thu, 13 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  debugging v2i8/v3i8


  Commit: f431123ac5be268c4707d7f16878039c6051e71c
      https://github.com/llvm/llvm-project/commit/f431123ac5be268c4707d7f16878039c6051e71c
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-13 (Thu, 13 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  resolved issues with ret v2i8


  Commit: 30fc9fa3a4695f99b0aaabcec2e05118e8ee4b61
      https://github.com/llvm/llvm-project/commit/30fc9fa3a4695f99b0aaabcec2e05118e8ee4b61
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp

  Log Message:
  -----------
  cleaned up print statements, checking load/store behavior


  Commit: 85982d60133d2bfdabb33dbf95b1dce3f9754ae7
      https://github.com/llvm/llvm-project/commit/85982d60133d2bfdabb33dbf95b1dce3f9754ae7
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/BUFInstructions.td
    M llvm/lib/Target/AMDGPU/FLATInstructions.td
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp

  Log Message:
  -----------
  new selection patterns for load/store


  Commit: bb408f1e1a8a97826b28e3e9327bd8ad91dbd5a1
      https://github.com/llvm/llvm-project/commit/bb408f1e1a8a97826b28e3e9327bd8ad91dbd5a1
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td

  Log Message:
  -----------
  save for switching


  Commit: 39bf272b7d5086b982f0ec4b4aa545310f8ef20a
      https://github.com/llvm/llvm-project/commit/39bf272b7d5086b982f0ec4b4aa545310f8ef20a
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td

  Log Message:
  -----------
  tablegen accepts i8 as operand in patterns


Compare: https://github.com/llvm/llvm-project/compare/ec1747cb71d0%5E...39bf272b7d50