[all-commits] [llvm/llvm-project] c2e7c9: [CodeGen] Using ZExt for extractelement indices.

[Peter Rong via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c2e7c9cb33acbd118fe5011a1607d6cf8e21de34
      https://github.com/llvm/llvm-project/commit/c2e7c9cb33acbd118fe5011a1607d6cf8e21de34
  Author: Peter Rong <PeterRong96 at gmail.com>
  Date:   2022-10-15 (Sat, 15 Oct 2022)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
    M llvm/test/CodeGen/AArch64/sve-extract-element.ll
    M llvm/test/CodeGen/AArch64/sve-insert-element.ll
    M llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
    M llvm/test/CodeGen/Mips/msa/basic_operations.ll
    M llvm/test/CodeGen/Mips/msa/basic_operations_float.ll
    M llvm/test/CodeGen/PowerPC/aix-p9-xxinsertw-xxextractuw.ll
    M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9.ll
    M llvm/test/CodeGen/PowerPC/aix-vec_extract_p9_2.ll
    M llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
    M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
    M llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
    M llvm/test/CodeGen/PowerPC/vec_extract_p9.ll
    M llvm/test/CodeGen/PowerPC/vec_extract_p9_2.ll
    M llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
    M llvm/test/CodeGen/VE/Vector/extract_elt.ll
    M llvm/test/CodeGen/VE/Vector/insert_elt.ll
    M llvm/test/CodeGen/WebAssembly/simd-build-vector.ll
    M llvm/test/CodeGen/X86/extract-insert.ll
    M llvm/test/CodeGen/X86/insertelement-var-index.ll
    M llvm/test/CodeGen/X86/var-permute-128.ll
    M llvm/test/CodeGen/X86/var-permute-512.ll
    M llvm/test/CodeGen/X86/vec_extract.ll

  Log Message:
  -----------
  [CodeGen] Using ZExt for extractelement indices.

In https://github.com/llvm/llvm-project/issues/57452, we found that IRTranslator is translating `i1 true` into `i32 -1`.
This is because IRTranslator uses SExt for indices.

In this fix, we change the expected behavior of extractelement's index, moving from SExt to ZExt.
This change includes both documentation, SelectionDAG and IRTranslator.
We also included a test for AMDGPU, updated tests for AArch64, Mips, PowerPC, RISCV, VE, WebAssembly and X86

This patch fixes issue #57452.

Differential Revision: https://reviews.llvm.org/D132978