[all-commits] [llvm/llvm-project] b465a9: [Hexagon] Fix isTypeForHVX for vector predicates

[Krzysztof Parzyszek via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b465a983168bf87dc269848c82ffc49ac8dbec20
      https://github.com/llvm/llvm-project/commit/b465a983168bf87dc269848c82ffc49ac8dbec20
  Author: Krzysztof Parzyszek <kparzysz at quicinc.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp

  Log Message:
  -----------
  [Hexagon] Fix isTypeForHVX for vector predicates

HexagonSubtarget::isTypeFixHVX would stop breaking the type up when it
reached 64 bits in width. HVX vector predicates can be shorter than that,
for example <32 x i1> would have a bitwidth of 32, and it's still a valid
HVX type.