[all-commits] [llvm/llvm-project] 60e2aa: [AArch64]Change printVectorList to print SVE vecto...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 60e2aad109fc793de831de4a00116a3616e0e543
      https://github.com/llvm/llvm-project/commit/60e2aad109fc793de831de4a00116a3616e0e543
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2022-10-14 (Fri, 14 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
    M llvm/test/CodeGen/AArch64/sve-calling-convention-mixed.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
    M llvm/test/CodeGen/AArch64/sve-ldN.mir
    M llvm/test/CodeGen/AArch64/sve-stN.mir
    M llvm/test/MC/AArch64/SVE/ld3b.s
    M llvm/test/MC/AArch64/SVE/ld3d.s
    M llvm/test/MC/AArch64/SVE/ld3h.s
    M llvm/test/MC/AArch64/SVE/ld3w.s
    M llvm/test/MC/AArch64/SVE/ld4b.s
    M llvm/test/MC/AArch64/SVE/ld4d.s
    M llvm/test/MC/AArch64/SVE/ld4h.s
    M llvm/test/MC/AArch64/SVE/ld4w.s
    M llvm/test/MC/AArch64/SVE/st3b.s
    M llvm/test/MC/AArch64/SVE/st3d.s
    M llvm/test/MC/AArch64/SVE/st3h.s
    M llvm/test/MC/AArch64/SVE/st3w.s
    M llvm/test/MC/AArch64/SVE/st4b.s
    M llvm/test/MC/AArch64/SVE/st4d.s
    M llvm/test/MC/AArch64/SVE/st4h.s
    M llvm/test/MC/AArch64/SVE/st4w.s
    M llvm/test/tools/llvm-mca/AArch64/A64FX/A64FX-sve-instructions.s
    M llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s

  Log Message:
  -----------
  [AArch64]Change printVectorList to print SVE vector range

This patch has the prefered disassembly changed for SVE vector list.
For instance, instead of printing this assembly:
  ld4d { z1.d, z2.d, z3.d, z4.d }, p0/z, [x0]
it will print this:
  ld4d { z1.d-z4.d }, p0/z, [x0]

Differential Revision: https://reviews.llvm.org/D135952