[all-commits] [llvm/llvm-project] a77a70: [PowerPC] Stash GPR to VSR if emergency spill slot...

[Nemanja Ivanovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a77a70fa3c80518e58c68aaaf3c7159a9738f058
      https://github.com/llvm/llvm-project/commit/a77a70fa3c80518e58c68aaaf3c7159a9738f058
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2022-10-13 (Thu, 13 Oct 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
    A llvm/test/CodeGen/PowerPC/pr52894-32bit.ll
    A llvm/test/CodeGen/PowerPC/pr52894.ll

  Log Message:
  -----------
  [PowerPC] Stash GPR to VSR if emergency spill slot is not reachable

When removing frame indices on PowerPC, we need to scavenge
a GPR to materialize a large constant if the stack offset
for the spill/reload cannot be reached by a D-Form
instruction. However, in a perfect storm of conditions,
we may not have GPR's available to scavenge, thereby
requiring an emergency spill. If such an emergency
spill also needs to be spilled to a location with a
large offset, it would itself require register scavenging
thereby creating an infinite loop.

This patch detects when the scavenger cannot scavenge
a register and the spill/reload is to a location with
a large offset. It then stashes a GPR into a VSR so
that it can use the GPR to materialize the constant
(rather than scavenging a GPR).

Fixes: https://github.com/llvm/llvm-project/issues/52894

Differential revision: https://reviews.llvm.org/D124841