[all-commits] [llvm/llvm-project] fa9c12: [X86] Attempt to combine binary shuffles where bot...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fa9c12ed964b8201e142d78e430ad4c76bd7af62
      https://github.com/llvm/llvm-project/commit/fa9c12ed964b8201e142d78e430ad4c76bd7af62
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-10-13 (Thu, 13 Oct 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
    M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll
    M llvm/test/CodeGen/X86/vector-shuffle-combining.ll

  Log Message:
  -----------
  [X86] Attempt to combine binary shuffles where both operands come from the same larger vector

Allows us to use combineX86ShuffleChainWithExtract to combine targetshuffle(low_subvector(x),high_subvector(x)) -> low_subvector(targetshuffle(x)) style patterns

This is currently very limited (it must have a v2i64/v2f64 result), but while triaging I noticed we might be able to extend this to allow more types for targets with suitable variable cross lane shuffle support.

Fixes #58339