[all-commits] [llvm/llvm-project] b1d7a9: [LoongArch] Add earlyclobber of destination regist...

[Gong LingQin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b1d7a95e4e4a2b57cbe02636bbe357dc48d615c5
      https://github.com/llvm/llvm-project/commit/b1d7a95e4e4a2b57cbe02636bbe357dc48d615c5
  Author: gonglingqin <gonglingqin at loongson.cn>
  Date:   2022-10-12 (Wed, 12 Oct 2022)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll

  Log Message:
  -----------
  [LoongArch] Add earlyclobber of destination register to atomic instructions

If the AM* atomic memory access instruction has the same register number as
rd and rj, the execution will trigger an Instruction Non-defined Exception.
If the AM* atomic memory access instruction has the same register number as
rd and rk, the execution result is uncertain.

Reference: https://github.com/loongson/LoongArch-Documentation

Differential Revision: https://reviews.llvm.org/D135641