[all-commits] [llvm/llvm-project] 0148df: [DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0148df8157f05ecf3b1064508e6f012aefb87dad
      https://github.com/llvm/llvm-project/commit/0148df8157f05ecf3b1064508e6f012aefb87dad
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-11 (Tue, 11 Oct 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/umulo-128-legalisation-lowering.ll
    M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
    M llvm/test/CodeGen/PowerPC/pr45448.ll
    M llvm/test/CodeGen/RISCV/mul.ll
    M llvm/test/CodeGen/RISCV/xaluo.ll
    M llvm/test/CodeGen/Thumb2/mve-vmull-splat.ll
    M llvm/test/CodeGen/X86/extmul128.ll
    M llvm/test/CodeGen/X86/muloti.ll
    M llvm/test/CodeGen/X86/smul_fix_sat.ll
    M llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
    M llvm/test/CodeGen/X86/vec_smulo.ll
    M llvm/test/CodeGen/X86/xmulo.ll

  Log Message:
  -----------
  [DAGCombiner] Fold (mul (sra X, BW-1), Y) -> (neg (and (sra X, BW-1), Y))

(sra X, BW-1) is either 0 or -1. So the multiply is a conditional
negate of Y.

This pattern shows up when type legalizing wide multiplies involving
a sign extended value.

Fixes PR57549.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D133399