[all-commits] [llvm/llvm-project] 6b24bd: [RISCV] Remove some vsetvli intrinsics under Zve32*.

Craig Topper via All-commits all-commits at lists.llvm.org
Sun Oct 9 21:48:49 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6b24bdb4a5ecc2f27bfe6aa992e6686bc40c995a
      https://github.com/llvm/llvm-project/commit/6b24bdb4a5ecc2f27bfe6aa992e6686bc40c995a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-09 (Sun, 09 Oct 2022)

  Changed paths:
    M clang/include/clang/Basic/riscv_vector.td

  Log Message:
  -----------
  [RISCV] Remove some vsetvli intrinsics under Zve32*.

Zve32* does not support SEW=64. Or any LMUL smaller than 32/SEW.

Reviewed By: eopXD

Differential Revision: https://reviews.llvm.org/D135519




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