[all-commits] [llvm/llvm-project] 9f6704: [VP][RISCV] Add vp.smax/smin/umax/umin intrinsics

Craig Topper via All-commits all-commits at lists.llvm.org
Fri Oct 7 17:14:51 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9f67047cf06ec189956f7bcfb61bda2db7a3559d
      https://github.com/llvm/llvm-project/commit/9f67047cf06ec189956f7bcfb61bda2db7a3559d
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP][RISCV] Add vp.smax/smin/umax/umin intrinsics

Differential Revision: https://reviews.llvm.org/D135418




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