[all-commits] [llvm/llvm-project] 3a25b2: llvm-reduce: Fix missing C++ mode comments

Matt Arsenault via All-commits all-commits at lists.llvm.org
Fri Oct 7 13:15:33 PDT 2022


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3a25b21c4eece8a30375eca53cac350ba4f0ec47
      https://github.com/llvm/llvm-project/commit/3a25b21c4eece8a30375eca53cac350ba4f0ec47
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    M llvm/tools/llvm-reduce/DeltaManager.h
    M llvm/tools/llvm-reduce/ReducerWorkItem.h
    M llvm/tools/llvm-reduce/deltas/Delta.h
    M llvm/tools/llvm-reduce/deltas/ReduceAliases.h
    M llvm/tools/llvm-reduce/deltas/ReduceArguments.h
    M llvm/tools/llvm-reduce/deltas/ReduceAttributes.h
    M llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.h
    M llvm/tools/llvm-reduce/deltas/ReduceFunctionBodies.h
    M llvm/tools/llvm-reduce/deltas/ReduceFunctions.h
    M llvm/tools/llvm-reduce/deltas/ReduceGlobalObjects.h
    M llvm/tools/llvm-reduce/deltas/ReduceGlobalValues.h
    M llvm/tools/llvm-reduce/deltas/ReduceGlobalVarInitializers.h
    M llvm/tools/llvm-reduce/deltas/ReduceGlobalVars.h
    M llvm/tools/llvm-reduce/deltas/ReduceInstructionFlagsMIR.h
    M llvm/tools/llvm-reduce/deltas/ReduceInstructions.h
    M llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.h
    M llvm/tools/llvm-reduce/deltas/ReduceMetadata.h
    M llvm/tools/llvm-reduce/deltas/ReduceModuleData.h
    M llvm/tools/llvm-reduce/deltas/ReduceOperandBundles.h
    M llvm/tools/llvm-reduce/deltas/ReduceOperands.h
    M llvm/tools/llvm-reduce/deltas/ReduceOperandsSkip.h
    M llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.h
    M llvm/tools/llvm-reduce/deltas/ReduceSpecialGlobals.h
    M llvm/tools/llvm-reduce/deltas/ReduceUsingSimplifyCFG.h
    M llvm/tools/llvm-reduce/deltas/RunIRPasses.h
    M llvm/tools/llvm-reduce/deltas/Utils.h

  Log Message:
  -----------
  llvm-reduce: Fix missing C++ mode comments


  Commit: 023f24d8931267074aa5a60078dddc744187fcfc
      https://github.com/llvm/llvm-project/commit/023f24d8931267074aa5a60078dddc744187fcfc
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    M llvm/test/tools/llvm-reduce/remove-bbs-entry.ll
    M llvm/test/tools/llvm-reduce/remove-bbs-ret-nonvoid.ll
    M llvm/test/tools/llvm-reduce/remove-bbs-sequence.ll
    M llvm/test/tools/llvm-reduce/remove-bbs-unreachable.ll
    M llvm/test/tools/llvm-reduce/remove-bbs.ll
    M llvm/test/tools/llvm-reduce/remove-call-site-attributes.ll

  Log Message:
  -----------
  llvm-reduce: Use -abort-on-invalid-reduction in a test

Also stop using cat


  Commit: 0a159427adf1dbc6e9ddab57fe352074b6d4a501
      https://github.com/llvm/llvm-project/commit/0a159427adf1dbc6e9ddab57fe352074b6d4a501
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    A llvm/test/tools/llvm-reduce/reduce-operands-repeated-phi-input.ll
    M llvm/tools/llvm-reduce/deltas/ReduceOperands.cpp

  Log Message:
  -----------
  llvm-reduce: Fix invalid reduction for phis with repeat inputs

Phis have a quirk where the same predecessor block may appear multiple times
if the same block branches to it multiple ways. All the values need to match,
but this was replacing each operand independently. If an operand can be simplified,
make sure to replace every instance of the incoming block's value.


  Commit: 7721cba2eeb41a45f002ee923cb7acef89fa7483
      https://github.com/llvm/llvm-project/commit/7721cba2eeb41a45f002ee923cb7acef89fa7483
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    A llvm/test/tools/llvm-reduce/reduce-operands-skip-repeated-phi-input.ll
    M llvm/tools/llvm-reduce/deltas/ReduceOperandsSkip.cpp

  Log Message:
  -----------
  llvm-reduce: Fix another invalid reduction with repeated input phis

ReduceOperandsSkip had the same issue as ReduceOperands when handling
phis with repeated predecessors.


  Commit: 74ef03d38a59bb4da710a43dac189be3d01d0cd7
      https://github.com/llvm/llvm-project/commit/74ef03d38a59bb4da710a43dac189be3d01d0cd7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2022-10-07 (Fri, 07 Oct 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
    A llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll

  Log Message:
  -----------
  AMDGPU: Update SlotIndexes independently of LiveIntervals

Apparently StackColoring depends on SlotIndexes, but not
LiveIntervals. If regalloc fast were manually requested, LiveIntervals
would be dropped before SILowerSGPRSpills but not SlotIndexes.

SILowerSGPRSpills preserved SlotIndexes, but only through
LiveIntervals. As a result, SILowerSGPRSpills was incorrectly
reporting it preserved SlotIndexes. Start updating these directly,
instead of depending on LiveIntervals also being available.


Compare: https://github.com/llvm/llvm-project/compare/d32df0f63d27...74ef03d38a59


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