[all-commits] [llvm/llvm-project] 273496: [RISCV] Restructure eliminateFrameIndex to share m...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2734968e325b701110147098539a0a98d1c2878b
      https://github.com/llvm/llvm-project/commit/2734968e325b701110147098539a0a98d1c2878b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-04 (Tue, 04 Oct 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp

  Log Message:
  -----------
  [RISCV] Restructure eliminateFrameIndex to share more code. NFC

The old code took two different paths based on whether there is
a scalable offset, but these two paths had some code in common.

The main difference between the two code paths was whether we needed
to create a GPR or not for the ADDI that gets created for RVVSpill.
If we had a scalable offset, the same GPR was used as the destination
for adding the scalable offset and the ADDI. To manage this, we now
cache the scratch register and reuse it if it has already been created.

This is a pre-patch for D135009.

Reviewed By: reames, frasercrmck

Differential Revision: https://reviews.llvm.org/D135092


  Commit: a38fb90b19d278d666c6cbf79ad23aea20f88fbd
      https://github.com/llvm/llvm-project/commit/a38fb90b19d278d666c6cbf79ad23aea20f88fbd
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-04 (Tue, 04 Oct 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
    M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
    M llvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
    M llvm/test/CodeGen/RISCV/rvv/localvar.ll
    M llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll

  Log Message:
  -----------
  [RISCV] Refactor and improve eliminateFrameIndex.

There are few changes mixed in here.

-Try to reuse the destination register from ADDI instead of always
creating a virtual register. This way we lean on the register
scavenger in fewer case.
-Explicitly reuse the primary virtual register when possible. There's
still a case where both getVLENFactoredAmount and handling large
fixed offsets can both create a secondary virtual register.
-Combine similar BuildMI calls by manipulating the Register variables.

There are still a couple early outs for ADDI, but overall I tried to
arrange the code into steps.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D135009


Compare: https://github.com/llvm/llvm-project/compare/e3f439ea20e4...a38fb90b19d2