[all-commits] [llvm/llvm-project] 05df15: [RISCV] Use _TIED form of VFWADD(U)_WV/VFWSUB(U)_W...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 05df15965b16187ec8138f713348211e7f76cb37
      https://github.com/llvm/llvm-project/commit/05df15965b16187ec8138f713348211e7f76cb37
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-10-03 (Mon, 03 Oct 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll

  Log Message:
  -----------
  [RISCV] Use _TIED form of VFWADD(U)_WV/VFWSUB(U)_WV to avoid early clobber.

One of the sources is the same size as the destination so that source
doesn't have an overlap with the destination register. By using the _TIED
form we avoid an early clobber contraint for that source.

This matches what was already done for instrinsics. ConvertToThreeAddress
will fix it if it can't stay tied.