[all-commits] [llvm/llvm-project] ddc046: [Flang][OpenMP] Add support for logical and reduct...

[DylanFleming-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ddc0465369a373f2022283905fdc7677eeaf9525
      https://github.com/llvm/llvm-project/commit/ddc0465369a373f2022283905fdc7677eeaf9525
  Author: Dylan Fleming <Dylan.Fleming at arm.com>
  Date:   2022-09-09 (Fri, 09 Sep 2022)

  Changed paths:
    M flang/include/flang/Lower/OpenMP.h
    M flang/lib/Lower/OpenMP.cpp
    R flang/test/Lower/OpenMP/Todo/reduction-and.f90
    A flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90

  Log Message:
  -----------
  [Flang][OpenMP] Add support for logical and reduction in worksharing-loop

Adds support for .and. reductions with logical types.

Because arith.addi doesn'to work with fir.logical<4> types
logical<4> must be converted to i1 prior to the operation.

This means that the pattern matched by integer reductions
(load -> op -> store) will not match logical reductions.
Instead, the pattern being searched for here is
load -> convert(logical<4> to i1) -> op -> convert(i1 to logical<4>) -> store

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D132228