[all-commits] [llvm/llvm-project] 95d497: [AMDGPU] W/a hazard if 64 bit shift amount is a hi...

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 95d497ff2a765ec1038f5670a07369e1c4f639c4
      https://github.com/llvm/llvm-project/commit/95d497ff2a765ec1038f5670a07369e1c4f639c4
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2022-09-07 (Wed, 07 Sep 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    A llvm/test/CodeGen/AMDGPU/hazard-shift64.mir

  Log Message:
  -----------
  [AMDGPU] W/a hazard if 64 bit shift amount is a highest allocated VGPR

In this case gfx90a uses v0 instead of the correct register. Swap
the value temporarily with a lower register and then swap it back.

Unfortunately hazard recognizer works after wait count insertion,
so we cannot simply reuse an arbitrary register, hence w/a also
includes a full waitcount. This can be avoided if we run it from
expandPostRAPseudo, but that is a complete misplacement.

Differential Revision: https://reviews.llvm.org/D133067