[all-commits] [llvm/llvm-project] 2090e8: [llvm/CodeGen] Enable the ExpandLargeDivRem pass f...

[Matthias Gehre via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2090e85fee9b2d2a1ca6402b5f44c7d41d1e353f
      https://github.com/llvm/llvm-project/commit/2090e85fee9b2d2a1ca6402b5f44c7d41d1e353f
  Author: Matthias Gehre <matthias.gehre at xilinx.com>
  Date:   2022-09-06 (Tue, 06 Sep 2022)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/CodeGen/ExpandLargeDivRem.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.h
    M llvm/test/CodeGen/AArch64/O0-pipeline.ll
    M llvm/test/CodeGen/AArch64/O3-pipeline.ll
    A llvm/test/CodeGen/AArch64/udivmodei5.ll
    M llvm/test/CodeGen/ARM/O3-pipeline.ll
    A llvm/test/CodeGen/ARM/udivmodei5.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
    M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
    M llvm/test/CodeGen/X86/i128-sdiv.ll
    M llvm/test/CodeGen/X86/i128-udiv.ll
    R llvm/test/CodeGen/X86/libcall-sret.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/CodeGen/X86/pr38539.ll
    A llvm/test/CodeGen/X86/udivmodei5.ll

  Log Message:
  -----------
  [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64

This adds the ExpandLargeDivRem to the default pass pipeline.
The limit at which it expands div/rem instructions is configured
via a new TargetTransformInfo hook (default: no expansion)
X86, Arm and AArch64 backends implement this hook to expand div/rem
instructions with more than 128 bits.

Differential Revision: https://reviews.llvm.org/D130076