[all-commits] [llvm/llvm-project] f8d4da: [X86] Fix reciprocal instruction throughput/uops c...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f8d4da76307ed15799f352e91d62df27c4602320
      https://github.com/llvm/llvm-project/commit/f8d4da76307ed15799f352e91d62df27c4602320
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-09-01 (Thu, 01 Sep 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver1.td
    M llvm/lib/Target/X86/X86ScheduleZnver2.td
    M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Znver1/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s

  Log Message:
  -----------
  [X86] Fix reciprocal instruction throughput/uops counts

Matches numbers from AMD SoG + Agner - should always be on FPU Pipes 0+1, no additional uops for folded instructions and znver1 double pumps 256-bit vectors

Noticed while adding CostKinds support to the x86 cost models