[all-commits] [llvm/llvm-project] 77dbc5: [MachineCSE] Use TargetInstrInfo::isAsCheapAsAMove...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 77dbc5200bb5bf8fbf42d6f183599c2ae9575f29
      https://github.com/llvm/llvm-project/commit/77dbc5200bb5bf8fbf42d6f183599c2ae9575f29
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-31 (Wed, 31 Aug 2022)

  Changed paths:
    M llvm/lib/CodeGen/MachineCSE.cpp

  Log Message:
  -----------
  [MachineCSE] Use TargetInstrInfo::isAsCheapAsAMove in isPRECandidate.

Some targets like RISC-V require operands to be inspected to
determine if an instruction is similar to a move.

Spotted while investigating code differences between using an ADDI
vs an ADDIW. RISC-V has the isAsCheapAsAMove flag for ADDI, but
the TII hook checks the immediate is 0 or the register is X0. ADDIW
is never generated with X0 or with an immediate of 0 so it doesn't
have the isAsCheapAsAMove flag.

I don't know enough about the PRE code to write a test for this yet.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D132981