[all-commits] [llvm/llvm-project] 8dce35: [VP] Correct the LEGALPOS for VP_STORE.

[Michael Maitland via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8dce3507a08f3e6b0c37bf90413534a4432fa6bf
      https://github.com/llvm/llvm-project/commit/8dce3507a08f3e6b0c37bf90413534a4432fa6bf
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-31 (Wed, 31 Aug 2022)

  Changed paths:
    M llvm/include/llvm/IR/VPIntrinsics.def

  Log Message:
  -----------
  [VP] Correct the LEGALPOS for VP_STORE.

VP_STORE has a Chain for operand 0, so the LEGALPOS should be 1.

VP_STORE is always considered Legal for MVT::Other. So I suspect this
was causing vp_store to be ignored by LegalizeVectorOps and instead
handled in LegalizeDAG.

VP_LOAD is Custom expanded in LegalizeVectorOps for RISC-V.

Differential Revision: https://reviews.llvm.org/D132972


  Commit: 30a4264f5fb24ee34de5a61cc8ba8d9d879b5af5
      https://github.com/llvm/llvm-project/commit/30a4264f5fb24ee34de5a61cc8ba8d9d879b5af5
  Author: Michael Maitland <michael.maitland at sifive.com>
  Date:   2022-08-31 (Wed, 31 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp

  Log Message:
  -----------
  [RISCV][CodeGen] add assertion to RISCVTargetStreamer getTargetStreamer()

X86 and ARM AsmParsers have this same assertion. This assertion provides better reporting when the RISCVTargetStreamer is null and helps to prevent null pointer access.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D132863


Compare: https://github.com/llvm/llvm-project/compare/068fe0724d5f...30a4264f5fb2