[all-commits] [llvm/llvm-project] 2f811a: [VP][RISCV] Add vp.fabs intrinsic and RISC-V support.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2f811a6c7f43bf8d71e49388e0e82c924fb7a00c
      https://github.com/llvm/llvm-project/commit/2f811a6c7f43bf8d71e49388e0e82c924fb7a00c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-29 (Mon, 29 Aug 2022)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/VPIntrinsics.def
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfabs-vp.ll
    A llvm/test/CodeGen/RISCV/rvv/vfabs-vp.ll
    M llvm/unittests/IR/VPIntrinsicTest.cpp

  Log Message:
  -----------
  [VP][RISCV] Add vp.fabs intrinsic and RISC-V support.

Mostly just modeled after vp.fneg except there is a
"functional instruction" for fneg while fabs is always an
intrinsic.

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D132793