[all-commits] [llvm/llvm-project] fa9638: [X86] Fold PMULUDQ(X, 1) -> AND(X, (1<<32)-1) 'getZe...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fa96383506e23f972b54f8c4aa6e74030dabd7a7
      https://github.com/llvm/llvm-project/commit/fa96383506e23f972b54f8c4aa6e74030dabd7a7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-08-20 (Sat, 20 Aug 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
    M llvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
    M llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll

  Log Message:
  -----------
  [X86] Fold PMULUDQ(X,1) -> AND(X,(1<<32)-1) 'getZeroExtendInReg'

Fix cases where shl/srem/urem expansion results in a mulh/mul_lohi(x,1) 'pass through' that gets lowered to pmuludq.

Fixes #56684