[all-commits] [llvm/llvm-project] 1492c8: [PowerPC] Fix bugs in sign-/zero-extension elimina...

[stefanp-ibm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1492c88f494cb09de0ebc7fb77a84c41d0aa93ce
      https://github.com/llvm/llvm-project/commit/1492c88f494cb09de0ebc7fb77a84c41d0aa93ce
  Author: Stefan Pintilie <stefanp at ca.ibm.com>
  Date:   2022-08-19 (Fri, 19 Aug 2022)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
    M llvm/lib/Target/PowerPC/PPCInstrFormats.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
    M llvm/lib/Target/PowerPC/PPCInstrInfo.h
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCInstrP10.td
    M llvm/lib/Target/PowerPC/PPCInstrVSX.td
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
    M llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll
    M llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll
    M llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll
    M llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll
    M llvm/test/CodeGen/PowerPC/bcd-intrinsics.ll
    M llvm/test/CodeGen/PowerPC/csr-split.ll
    M llvm/test/CodeGen/PowerPC/dform-pair-load-store.ll
    M llvm/test/CodeGen/PowerPC/expand-isel.ll
    M llvm/test/CodeGen/PowerPC/f128-conv.ll
    M llvm/test/CodeGen/PowerPC/f128-truncateNconv.ll
    M llvm/test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
    M llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll
    M llvm/test/CodeGen/PowerPC/fp-strict-conv.ll
    M llvm/test/CodeGen/PowerPC/ifcvt_cr_field.ll
    M llvm/test/CodeGen/PowerPC/loop-instr-prep-non-const-increasement.ll
    M llvm/test/CodeGen/PowerPC/machine-pre.ll
    M llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
    M llvm/test/CodeGen/PowerPC/optcmp.ll
    M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll
    M llvm/test/CodeGen/PowerPC/ppc-ctr-dead-code.ll
    M llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll
    M llvm/test/CodeGen/PowerPC/ppc64-inlineasm-clobber.ll
    M llvm/test/CodeGen/PowerPC/pr41088.ll
    M llvm/test/CodeGen/PowerPC/pr47660.ll
    M llvm/test/CodeGen/PowerPC/prefer-dqform.ll
    M llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
    M llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
    M llvm/test/CodeGen/PowerPC/select-constant-xor.ll
    A llvm/test/CodeGen/PowerPC/sext_elimination.mir
    M llvm/test/CodeGen/PowerPC/sign-ext-atomics.ll
    M llvm/test/CodeGen/PowerPC/stack-restore-with-setjmp.ll
    M llvm/test/CodeGen/PowerPC/store-forward-be64.ll
    M llvm/test/CodeGen/PowerPC/tocSaveInPrologue.ll

  Log Message:
  -----------
  [PowerPC] Fix bugs in sign-/zero-extension elimination

This patch fixes the following two bugs in `PPCInstrInfo::isSignOrZeroExtended` helper, which is used from sign-/zero-extension elimination in PPCMIPeephole pass.
- Registers defined by load with update (e.g. LBZU) were identified as already sign or zero-extended. But it is true only for the first def (loaded value) and not for the second def (i.e. updated pointer).
- Registers defined by ORIS/XORIS were identified as already sign-extended. But, it is not true for sign extension depending on the immediate (while it is ok for zero extension).

To handle the first case, the parameter for the helpers is changed from `MachineInstr` to a register number to distinguish first and second defs. Also, this patch moves the initialization of PPCMIPeepholePass to allow mir test case.

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D40554