[all-commits] [llvm/llvm-project] 96c8d6: [SVE] Extend findMoreOptimalIndexType so BUILD_VEC...

[paulwalker-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 96c8d615d6660b0136b898303e78d1be0dd82108
      https://github.com/llvm/llvm-project/commit/96c8d615d6660b0136b898303e78d1be0dd82108
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2022-08-18 (Thu, 18 Aug 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-fixed-length-addressing-modes.ll

  Log Message:
  -----------
  [SVE] Extend findMoreOptimalIndexType so BUILD_VECTORs do not force 64bit indices.

Extends findMoreOptimalIndexType to allow ISD::BUILD_VECTOR based
indices to be truncated when such truncation is lossless. This can
enable the use of 32bit gather/scatter indices thus making it less
likely to have to split a gather/scatter in two.

Depends on D125194

Differential Revision: https://reviews.llvm.org/D130533