[all-commits] [llvm/llvm-project] b2ccfb: [mlir][LLVMIR] Change ShuffleVectorOp to use assem...

[Jeff Niu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b2ccfb4d956b479caa8d49dfb9ec2185351a05bc
      https://github.com/llvm/llvm-project/commit/b2ccfb4d956b479caa8d49dfb9ec2185351a05bc
  Author: Jeff Niu <jeff at modular.com>
  Date:   2022-08-18 (Thu, 18 Aug 2022)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
    M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
    M mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Dialect/LLVMIR/invalid.mlir
    M mlir/test/Dialect/LLVMIR/roundtrip.mlir
    M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
    M mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
    M mlir/test/Target/LLVMIR/Import/basic.ll
    M mlir/test/Target/LLVMIR/Import/incorrect-scalable-vector-check.ll
    M mlir/test/Target/LLVMIR/arm-neon.mlir
    M mlir/test/Target/LLVMIR/llvmir.mlir

  Log Message:
  -----------
  [mlir][LLVMIR] Change ShuffleVectorOp to use assembly format

This patch moves `LLVM::ShuffleVectorOp` to assembly format and in the
process drops the extra type that can be inferred (both operand types
are required to be the same) and switches to a dense integer array.

The syntax change:

```
// Before
%0 = llvm.shufflevector %0, %1 [0 : i32, 0 : i32, 0 : i32, 0 : i32] : vector<4xf32>, vector<4xf32>
// After
%0 = llvm.shufflevector %0, %1 [0, 0, 0, 0] : vector<4xf32>
```

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D132038