[all-commits] [llvm/llvm-project] b5a18d: [RISCV] Remove C!=0 restriction from (sub C, (setc...

Craig Topper via All-commits all-commits at lists.llvm.org
Tue Aug 16 14:55:38 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b5a18de65169b4aa54db0b0ebc3dcc3462570600
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-16 (Tue, 16 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/get-setcc-result-type.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
    M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
    M llvm/test/CodeGen/RISCV/select-const.ll
    M llvm/test/CodeGen/RISCV/sext-zext-trunc.ll
    M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll

  Log Message:
  [RISCV] Remove C!=0 restriction from (sub C, (setcc x, y, eq/neq)) -> (add C-1, (setcc x, y, neq/eq)).

While (sub 0, X) can use x0 for the 0, I believe (add X, -1) is
still preferrable. (addi X, -1) can be compressed, sub with x0 on
the LHS is never compressible.

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