[all-commits] [llvm/llvm-project] c7e588: [RISCV] Minor cleanups to performSUBCombine. NFC

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c7e58836e8799f32f546c52e4c32ae131ecf141e
      https://github.com/llvm/llvm-project/commit/c7e58836e8799f32f546c52e4c32ae131ecf141e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-16 (Tue, 16 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Minor cleanups to performSUBCombine. NFC

-Rename variable NnzC -> N0C.
-Use SelectionDAG::getSetCC to reduce code.
-Use SDValue::getOperand instead of operator-> and SDNode::getOperand.

Initial steps to add another similar combine to this code.


  Commit: 87e78372932e439d298c89f589e58ca05ffbc2d8
      https://github.com/llvm/llvm-project/commit/87e78372932e439d298c89f589e58ca05ffbc2d8
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-16 (Tue, 16 Aug 2022)

  Changed paths:
    M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/float-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/half-select-fcmp.ll

  Log Message:
  -----------
  [RISCV] Add test cases to show where we inverted a fp setcc and introduced an extra xori.

In these tests we had (sub C, (seteq X, Y)) which we converted to
the (add (setne X, Y), C-1). We don't have a FNE compare instruction
so this created an XORI to invert an FEQ instruction.

This might be a good idea since it can save a constant materialization,
but does not appear to be the intention of the original patch.


  Commit: 4184edc691b3d48280428ee8913c015adb66d7ec
      https://github.com/llvm/llvm-project/commit/4184edc691b3d48280428ee8913c015adb66d7ec
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-16 (Tue, 16 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/float-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/half-select-fcmp.ll

  Log Message:
  -----------
  [RISCV] (sub C, (setcc x, y, eq/neq)) -> (add C-1, (setcc x, y, neq/eq)) fold for FP setcc.

This introduce an xori in some cases. I don't believe it was the
intention of the original patch. This was an accident because
nonan FP equality compares also use SETEQ/SETNE.

Also pass the correct type to getSetCCInverse.


Compare: https://github.com/llvm/llvm-project/compare/50630dcc4c8a...4184edc691b3