[all-commits] [llvm/llvm-project] d79e7d: [DAG] SimplifyDemandedVectorElts - and/mul(x, y) - ...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Tue Aug 9 08:27:56 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d79e7dc939a3e9c422ecb4f7de17ca7a6d827ba7
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-08-09 (Tue, 09 Aug 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/X86/vector-fshl-512.ll
    M llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
    M llvm/test/CodeGen/X86/vector-fshr-512.ll
    M llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
    M llvm/test/CodeGen/X86/vector-rotate-512.ll

  Log Message:
  [DAG] SimplifyDemandedVectorElts - and/mul(x,y) - if a demanded element of y is known zero then we don't need to demand it in x

This fixes most of the remaining regressions from the fixes in rG293899c64b75

More information about the All-commits mailing list