[all-commits] [llvm/llvm-project] f5ed0c: [RISCV] Add target feature to force-enable atomics

Nikita Popov via All-commits all-commits at lists.llvm.org
Tue Aug 9 07:05:02 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f5ed0cb217a9988f97b55f2ccb053bca7b41cc0c
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2022-08-09 (Tue, 09 Aug 2022)

  Changed paths:
    M llvm/docs/Atomics.rst
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    A llvm/test/CodeGen/RISCV/forced-atomics.ll

  Log Message:
  [RISCV] Add target feature to force-enable atomics

This adds a +forced-atomics target feature with the same semantics
as +atomics-32 on ARM (D130480). For RISCV targets without the +a
extension, this forces LLVM to assume that lock-free atomics
(up to 32/64 bits for riscv32/64 respectively) are available.

This means that atomic load/store are lowered to a simple load/store
(and fence as necessary), as these are guaranteed to be atomic
(as long as they're aligned). Atomic RMW/CAS are lowered to __sync
(rather than __atomic) libcalls. Responsibility for providing the
__sync libcalls lies with the user (for privileged single-core code
they can be implemented by disabling interrupts). Code using
+forced-atomics and -forced-atomics are not ABI compatible if atomic
variables cross the ABI boundary.

For context, the difference between __sync and __atomic is that the
former are required to be lock-free, while the latter requires a
shared global lock provided by a shared object library. See
https://llvm.org/docs/Atomics.html#libcalls-atomic for a detailed
discussion on the topic.

This target feature will be used by Rust's riscv32i target family
to support the use of atomic load/store without atomic RMW/CAS.

Differential Revision: https://reviews.llvm.org/D130621

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