[all-commits] [llvm/llvm-project] 53d560: [RISCV] Prevent infinite loop after D129980.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 53d560b22f5b5d91ae5296f030e0ca75a5d2c625
      https://github.com/llvm/llvm-project/commit/53d560b22f5b5d91ae5296f030e0ca75a5d2c625
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-03 (Wed, 03 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/i64-icmp.ll

  Log Message:
  -----------
  [RISCV] Prevent infinite loop after D129980.

D129980 converts (seteq (i64 (and X, 0xffffffff)), C1) into
(seteq (i64 (sext_inreg X, i32)), C1). If bit 31 of X is 0, it
will be turned back into an 'and' by SimplifyDemandedBits which
can cause an infinite loop.

To prevent this, check if bit 31 is 0 with computeKnownBits before
doing the transformation.

Fixes PR56905.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D131113