[all-commits] [llvm/llvm-project] da5b1b: [RISCV] Teach RISCVMergeBaseOffset to merge %lo/%p...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: da5b1bf5bb0f1c3d7553a286ad50245bb11694b9
      https://github.com/llvm/llvm-project/commit/da5b1bf5bb0f1c3d7553a286ad50245bb11694b9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
    M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll

  Log Message:
  -----------
  [RISCV] Teach RISCVMergeBaseOffset to merge %lo/%pcrel_lo into load/store after folding arithmetic.

It's possible we have:
lui  a0, %hi(sym)
addi a0, %lo(sym)
addi a0, <offset1>
lw a0, <offset2>(a0)

We want to arrive at
lui a0, %hi(sym+offset1+offset2)
lw a0, %lo(sym+offset1+offset2)

We currently fail to do this because we only consider loads/stores
if we didn't find any arithmetic.

This patch splits arithmetic folding and load/store folding into
two separate phases. The load/store folding can no longer assume
the offset in hi/lo is 0 so we must combine the offsets. I've applied
the same simm32 limit that we applied in the arithmetic folding.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D130931