[all-commits] [llvm/llvm-project] 7fc52d: [AMDGPU] Fix DGEMM hazard for GFX90a

[vangthao95 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7fc52d7c8b114ea57003a30b9acca92a9797d274
      https://github.com/llvm/llvm-project/commit/7fc52d7c8b114ea57003a30b9acca92a9797d274
  Author: Vang Thao <Vang.Thao at amd.com>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir

  Log Message:
  -----------
  [AMDGPU] Fix DGEMM hazard for GFX90a

For VALU write and memory (VM, L/DS, FLAT) instructions, SQ would insert
wait-states to avoid data hazard. However when there is a DGEMM instruction
in-between them, SQ incorrectly disables the wait-states thus the data hazard
needs to be handled with this workaround.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D130677