[all-commits] [llvm/llvm-project] 260a64: [RISCV] Pre-RA expand pseudos pass

[Luís Marques via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 260a64106854986a981e49ed87ee740460a23eb5
      https://github.com/llvm/llvm-project/commit/260a64106854986a981e49ed87ee740460a23eb5
  Author: Luís Marques <luismarques at lowrisc.org>
  Date:   2022-07-31 (Sun, 31 Jul 2022)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/Target/RISCV/RISCV.h
    M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    M llvm/lib/Target/RISCV/RISCVMCInstLower.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/test/CodeGen/RISCV/O3-pipeline.ll
    M llvm/test/CodeGen/RISCV/codemodel-lowering.ll
    M llvm/test/CodeGen/RISCV/elf-preemption.ll
    M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
    M llvm/test/CodeGen/RISCV/jumptable.ll
    M llvm/test/CodeGen/RISCV/machinelicm-address-pseudos.ll
    M llvm/test/CodeGen/RISCV/mir-target-flags.ll
    M llvm/test/CodeGen/RISCV/pic-models.ll
    M llvm/test/CodeGen/RISCV/tls-models.ll

  Log Message:
  -----------
  [RISCV] Pre-RA expand pseudos pass

Expand load address pseudo-instructions earlier (pre-ra) to allow follow-up
patches to fold the addi of PseudoLLA instructions into the immediate
operand of load/store instructions.

Differential Revision: https://reviews.llvm.org/D123264