[all-commits] [llvm/llvm-project] 9bf305: [RISCV] Swap the merge and mask operand order for ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9bf305fe2bd08a4e07afbfda05f65e4c09681c13
      https://github.com/llvm/llvm-project/commit/9bf305fe2bd08a4e07afbfda05f65e4c09681c13
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-30 (Sat, 30 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

  Log Message:
  -----------
  [RISCV] Swap the merge and mask operand order for VRGATHER*_VL and FCOPYSIGN_VL nodes.

Based on review feedback from D130816.


  Commit: a23f07fb1daad8a1fc9108c5de8c6a1503fda06c
      https://github.com/llvm/llvm-project/commit/a23f07fb1daad8a1fc9108c5de8c6a1503fda06c
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-30 (Sat, 30 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td

  Log Message:
  -----------
  [RISCV] Add merge operands to more RISCVISD::*_VL opcodes.

This adds a merge operand to all of the binary _VL nodes. Including
integer and widening. They all share multiclasses in tablegen
so doing them all at once was easiest.

I plan to use FADD_VL in an upcoming patch. The rest are just for
consistency to keep tablegen working.

This does reduce the isel table size by about 25k so that's nice.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D130816


Compare: https://github.com/llvm/llvm-project/compare/a14f94c20c65...a23f07fb1daa