[all-commits] [llvm/llvm-project] ba0d07: [AMDGPU] Aggressively schedule to reduce RP in occ...

[Austin Kerbow via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7
      https://github.com/llvm/llvm-project/commit/ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2022-07-27 (Wed, 27 Jul 2022)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
    M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
    A llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
    M llvm/test/CodeGen/AMDGPU/pr51516.mir
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll

  Log Message:
  -----------
  [AMDGPU] Aggressively schedule to reduce RP in occupancy limited regions

By not clustering loads and adjusting heuristics to more aggressively reduce
register pressure we may be able to increase occupancy for the function if it
was dropped in a first pass scheduling.

Similarly, try to reduce spilling if register usage exceeds lower bound
occupancy.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D130329