[all-commits] [llvm/llvm-project] 32622d: [RISCV] Add isel pattern for (mul (and X, 0xffffff...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32622d6de40af4da63389dfe9a520d0e013ac961
      https://github.com/llvm/llvm-project/commit/32622d6de40af4da63389dfe9a520d0e013ac961
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2022-07-27 (Wed, 27 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/test/CodeGen/RISCV/rv64zba.ll

  Log Message:
  -----------
  [RISCV] Add isel pattern for (mul (and X, 0xffffffff), 3<<C) with Zba.

We can use slli.uw by C followed by sh1add. Similar can be done
for multiples of 5 and 9. We need to make sure that C is less than
32 to stay in bounds of the 5-bit immediate for slli.uw.

We have existing patterns for (mul X, 3<<C) that use sh1add
followed by slli. That order doesn't allow the and to be folded.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D130146