[all-commits] [llvm/llvm-project] 4f676c: [trace][intel pt] Introduce wall clock time for ea...
walter erquinigo via All-commits
all-commits at lists.llvm.org
Tue Jul 26 12:05:42 PDT 2022
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 4f676c2599eb9c5c57528ebad93269a9ee30d7ca
https://github.com/llvm/llvm-project/commit/4f676c2599eb9c5c57528ebad93269a9ee30d7ca
Author: Walter Erquinigo <wallace at fb.com>
Date: 2022-07-26 (Tue, 26 Jul 2022)
Changed paths:
M lldb/include/lldb/Target/TraceCursor.h
M lldb/include/lldb/Target/TraceDumper.h
M lldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Commands/Options.td
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.cpp
M lldb/source/Plugins/Trace/intel-pt/DecodedThread.h
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/LibiptDecoder.h
M lldb/source/Plugins/Trace/intel-pt/ThreadDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/ThreadDecoder.h
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceCursorIntelPT.h
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPT.h
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTMultiCpuDecoder.cpp
M lldb/source/Plugins/Trace/intel-pt/TraceIntelPTMultiCpuDecoder.h
M lldb/source/Target/TraceCursor.cpp
M lldb/source/Target/TraceDumper.cpp
M lldb/test/API/commands/trace/TestTraceEvents.py
M lldb/test/API/commands/trace/TestTraceLoad.py
M lldb/test/API/commands/trace/TestTraceTSC.py
Log Message:
-----------
[trace][intel pt] Introduce wall clock time for each trace item
- Decouple TSCs from trace items
- Turn TSCs into events just like CPUs. The new name is HW clock tick, wich could be reused by other vendors.
- Add a GetWallTime that returns the wall time that the trace plug-in can infer for each trace item.
- For intel pt, we are doing the following interpolation: if an instruction takes less than 1 TSC, we use that duration, otherwise, we assume the instruction took 1 TSC. This helps us avoid having to handle context switches, changes to kernel, idle times, decoding errors, etc. We are just trying to show some approximation and not the real data. For the real data, TSCs are the way to go. Besides that, we are making sure that no two trace items will give the same interpolation value. Finally, we are using as time 0 the time at which tracing started.
Sample output:
```
(lldb) r
Process 750047 launched: '/home/wallace/a.out' (x86_64)
Process 750047 stopped
* thread #1, name = 'a.out', stop reason = breakpoint 1.1
frame #0: 0x0000000000402479 a.out`main at main.cpp:29:20
26 };
27
28 int main() {
-> 29 std::vector<int> vvv;
30 for (int i = 0; i < 100; i++)
31 vvv.push_back(i);
32
(lldb) process trace start -s 64kb -t --per-cpu
(lldb) b 60
Breakpoint 2: where = a.out`main + 1689 at main.cpp:60:23, address = 0x0000000000402afe
(lldb) c
Process 750047 resuming
Process 750047 stopped
* thread #1, name = 'a.out', stop reason = breakpoint 2.1
frame #0: 0x0000000000402afe a.out`main at main.cpp:60:23
57 map<int, int> m;
58 m[3] = 4;
59
-> 60 map<string, string> m2;
61 m2["5"] = "6";
62
63 std::vector<std::string> vs = {"2", "3"};
(lldb) thread trace dump instructions -t -f -e thread #1: tid = 750047
0: [379567.000 ns] (event) HW clock tick [48599428476224707]
1: [379569.000 ns] (event) CPU core changed [new CPU=2]
2: [390487.000 ns] (event) HW clock tick [48599428476246495]
3: [1602508.000 ns] (event) HW clock tick [48599428478664855]
4: [1662745.000 ns] (event) HW clock tick [48599428478785046]
libc.so.6`malloc
5: [1662746.995 ns] 0x00007ffff7176660 endbr64
6: [1662748.991 ns] 0x00007ffff7176664 movq 0x32387d(%rip), %rax ; + 408
7: [1662750.986 ns] 0x00007ffff717666b pushq %r12
8: [1662752.981 ns] 0x00007ffff717666d pushq %rbp
9: [1662754.977 ns] 0x00007ffff717666e pushq %rbx
10: [1662756.972 ns] 0x00007ffff717666f movq (%rax), %rax
11: [1662758.967 ns] 0x00007ffff7176672 testq %rax, %rax
12: [1662760.963 ns] 0x00007ffff7176675 jne 0x9c7e0 ; <+384>
13: [1662762.958 ns] 0x00007ffff717667b leaq 0x17(%rdi), %rax
14: [1662764.953 ns] 0x00007ffff717667f cmpq $0x1f, %rax
15: [1662766.949 ns] 0x00007ffff7176683 ja 0x9c730 ; <+208>
16: [1662768.944 ns] 0x00007ffff7176730 andq $-0x10, %rax
17: [1662770.939 ns] 0x00007ffff7176734 cmpq $-0x41, %rax
18: [1662772.935 ns] 0x00007ffff7176738 seta %dl
19: [1662774.930 ns] 0x00007ffff717673b jmp 0x9c690 ; <+48>
20: [1662776.925 ns] 0x00007ffff7176690 cmpq %rdi, %rax
21: [1662778.921 ns] 0x00007ffff7176693 jb 0x9c7b0 ; <+336>
22: [1662780.916 ns] 0x00007ffff7176699 testb %dl, %dl
23: [1662782.911 ns] 0x00007ffff717669b jne 0x9c7b0 ; <+336>
24: [1662784.906 ns] 0x00007ffff71766a1 movq 0x3236c0(%rip), %r12 ; + 24
(lldb) thread trace dump instructions -t -f -e -J -c 4
[
{
"id": 0,
"timestamp_ns": "379567.000000",
"event": "HW clock tick",
"hwClock": 48599428476224707
},
{
"id": 1,
"timestamp_ns": "379569.000000",
"event": "CPU core changed",
"cpuId": 2
},
{
"id": 2,
"timestamp_ns": "390487.000000",
"event": "HW clock tick",
"hwClock": 48599428476246495
},
{
"id": 3,
"timestamp_ns": "1602508.000000",
"event": "HW clock tick",
"hwClock": 48599428478664855
},
{
"id": 4,
"timestamp_ns": "1662745.000000",
"event": "HW clock tick",
"hwClock": 48599428478785046
},
{
"id": 5,
"timestamp_ns": "1662746.995324",
"loadAddress": "0x7ffff7176660",
"module": "libc.so.6",
"symbol": "malloc",
"mnemonic": "endbr64"
},
{
"id": 6,
"timestamp_ns": "1662748.990648",
"loadAddress": "0x7ffff7176664",
"module": "libc.so.6",
"symbol": "malloc",
"mnemonic": "movq"
},
{
"id": 7,
"timestamp_ns": "1662750.985972",
"loadAddress": "0x7ffff717666b",
"module": "libc.so.6",
"symbol": "malloc",
"mnemonic": "pushq"
},
{
"id": 8,
"timestamp_ns": "1662752.981296",
"loadAddress": "0x7ffff717666d",
"module": "libc.so.6",
"symbol": "malloc",
"mnemonic": "pushq"
}
]
```
Differential Revision: https://reviews.llvm.org/D130054
Commit: 0538e5431afdb1fa05bdcedf70ee502ccfcd112a
https://github.com/llvm/llvm-project/commit/0538e5431afdb1fa05bdcedf70ee502ccfcd112a
Author: Walter Erquinigo <wallace at fb.com>
Date: 2022-07-26 (Tue, 26 Jul 2022)
Changed paths:
M lldb/include/lldb/Core/Disassembler.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/unittests/Disassembler/x86/TestGetControlFlowKindx86.cpp
Log Message:
-----------
Move GetControlFlowKind's logic to DisassemblerLLVMC.cpp
This diff move the logic of `GetControlFlowKind()` from Disassembler.cpp to DisassemblerLLVMC.cpp.
Here's details:
- Actual logic of GetControlFlowKind() move to `DisassemblerLLVMC.cpp`, and we can check underlying architecture using `DisassemblerScope` there.
- With this change, passing 'triple' to `GetControlFlowKind()` is no more required.
Reviewed By: wallace
Differential Revision: https://reviews.llvm.org/D130320
Compare: https://github.com/llvm/llvm-project/compare/dcd09467b0b8...0538e5431afd
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