[all-commits] [llvm/llvm-project] 290c4b: [LLDB][ARM] Generalise adding register state in em...
David Spickett via All-commits
all-commits at lists.llvm.org
Tue Jul 26 01:22:40 PDT 2022
Author: David Spickett <david.spickett at linaro.org>
Date: 2022-07-26 (Tue, 26 Jul 2022)
[LLDB][ARM] Generalise adding register state in emulation tests and add D registers
Since some s and d registers overlap we will error if we find both.
This prevents you overwriting one with the other in a test case.
Reviewed By: clayborg
Differential Revision: https://reviews.llvm.org/D130462
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