[all-commits] [llvm/llvm-project] 5fb413: [X86][DAGISel] Don't widen shuffle element with AV...

Luo, Yuanke via All-commits all-commits at lists.llvm.org
Mon Jul 25 20:56:37 PDT 2022

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5fb41342105700949c81f68aefc85d9c46e9a1a6
  Author: Luo, Yuanke <yuanke.luo at intel.com>
  Date:   2022-07-26 (Tue, 26 Jul 2022)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
    M llvm/test/CodeGen/X86/combine-sdiv.ll

  Log Message:
  [X86][DAGISel] Don't widen shuffle element with AVX512

Currently the X86 shuffle lowering would widen the element type for
shuffle if the mask element value is adjacent. For below example

  %t2 = add nsw <16 x i32> %t0, %t1
  %t3 = sub nsw <16 x i32> %t0, %t1
  %t4 = shufflevector <16 x i32> %t2, <16 x i32> %t3,
                      <16 x i32> <i32 16, i32 17, i32 2, i32 3, i32 4,
                       i32 5, i32 6, i32 7, i32 8, i32 9, i32 10,
                       i32 11, i32 12, i32 13, i32 14, i32 15>

  ret <16 x i32> %t4

Compiler would transform the shuffle to
  %t4 = shufflevector <8 x i64> %t2, <8 x i64> %t3,
                      <8 x i64> <i32 8, i32 1, i32 2, i32 3, i32 4,
                                 i32 5, i32 6, i32 7>
This may lose the oppotunity to let ISel select mask instruction when
avx512 is enabled.

This patch is to prevent the tranform when avx512 feature is enabled.
Thank Simon for the idea.

Differential Revision: https://reviews.llvm.org/D129537

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