[all-commits] [llvm/llvm-project] 953a98: [AArch64][SVE] Fold target specific ext/trunc node...

[Bradley Smith via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 953a98ef8dbf66f7177e473f7ca2b6aff1a186c0
      https://github.com/llvm/llvm-project/commit/953a98ef8dbf66f7177e473f7ca2b6aff1a186c0
  Author: Bradley Smith <bradley.smith at arm.com>
  Date:   2022-07-25 (Mon, 25 Jul 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-fp-to-int.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-int-to-fp.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
    A llvm/test/CodeGen/AArch64/sve-uunpklo-load-uzp1-store-combine.ll

  Log Message:
  -----------
  [AArch64][SVE] Fold target specific ext/trunc nodes into loads/stores

Due to the way fixed length SVE lowering works, we sometimes introduce
ext/trunc nodes very late, these nodes then immediately get converted
into target specific nodes (UUNPKLO/UZP1) before they get a chance to be
folded into a load/store.

This patch introduces target specific dag combines for these nodes so that
we can still create extending loads/truncating stores out of them.

Differential Revision: https://reviews.llvm.org/D128065