[all-commits] [llvm/llvm-project] 5f89d2: [DAG] Move OR(AND(X, C1), AND(OR(X, Y), C2)) -> OR(AND...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f89d2bae964e21d8b7e9226c594d15d1c2e8325
      https://github.com/llvm/llvm-project/commit/5f89d2bae964e21d8b7e9226c594d15d1c2e8325
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2022-07-23 (Sat, 23 Jul 2022)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  [DAG] Move OR(AND(X,C1),AND(OR(X,Y),C2)) -> OR(AND(X,OR(C1,C2)),AND(Y,C2)) fold to SimplifyDemandedBits

This will fix the SystemZ v3i31 memcpy regression in D77804 (with the help of D129765 as well....).

It should also allow us to /bend/ the oneuse limitation for cases where we can use demanded bits to safely peek though multiple uses of the AND ops.