[all-commits] [llvm/llvm-project] bd228a: [RISCV] Extend use of SHXADD instructions in RVV s...

[Jianjian Guan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bd228a17727ec0f51f8606bbcfb4fe65aebbd0dd
      https://github.com/llvm/llvm-project/commit/bd228a17727ec0f51f8606bbcfb4fe65aebbd0dd
  Author: jacquesguan <Jianjian.Guan at streamcomputing.com>
  Date:   2022-07-18 (Mon, 18 Jul 2022)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll

  Log Message:
  -----------
  [RISCV] Extend use of SHXADD instructions in RVV spill/reload code.

This patch extends D124824. It uses SHXADD+SLLI to emit 3, 5, or 9 multiplied by a power 2.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D129179