[all-commits] [llvm/llvm-project] 3e0bf1: [CodeGen] Move instruction predicate verification ...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3e0bf1c7a9a4df5880f7a2c2d987c61b78fb499d
      https://github.com/llvm/llvm-project/commit/3e0bf1c7a9a4df5880f7a2c2d987c61b78fb499d
  Author: David Green <david.green at arm.com>
  Date:   2022-07-14 (Thu, 14 Jul 2022)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
    M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCTargetDesc.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/R600MCTargetDesc.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
    M llvm/lib/Target/AMDGPU/R600MCInstLower.cpp
    M llvm/lib/Target/ARC/ARCAsmPrinter.cpp
    M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.cpp
    M llvm/lib/Target/ARC/MCTargetDesc/ARCMCTargetDesc.h
    M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
    M llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
    M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
    M llvm/lib/Target/BPF/BPFAsmPrinter.cpp
    M llvm/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
    M llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
    M llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h
    M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
    M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.cpp
    M llvm/lib/Target/CSKY/MCTargetDesc/CSKYMCTargetDesc.h
    M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
    M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
    M llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp
    M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp
    M llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h
    M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
    M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.h
    M llvm/lib/Target/M68k/M68kAsmPrinter.cpp
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.h
    M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
    M llvm/lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.h
    M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
    M llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h
    M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
    M llvm/lib/Target/NVPTX/NVPTX.h
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
    M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.h
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCCodeEmitter.cpp
    M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.cpp
    M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVMCTargetDesc.h
    M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
    M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
    M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
    M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
    M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
    M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
    M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
    M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h
    M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
    M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
    M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
    M llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.h
    M llvm/lib/Target/VE/VEAsmPrinter.cpp
    M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp
    M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
    M llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
    M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
    M llvm/lib/Target/X86/X86MCInstLower.cpp
    M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
    M llvm/lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.h
    M llvm/lib/Target/XCore/XCoreAsmPrinter.cpp
    M llvm/utils/TableGen/CodeEmitterGen.cpp
    M llvm/utils/TableGen/InstrInfoEmitter.cpp
    M llvm/utils/TableGen/SubtargetFeatureInfo.cpp

  Log Message:
  -----------
  [CodeGen] Move instruction predicate verification to emitInstruction

D25618 added a method to verify the instruction predicates for an
emitted instruction, through verifyInstructionPredicates added into
<Target>MCCodeEmitter::encodeInstruction. This is a very useful idea,
but the implementation inside MCCodeEmitter made it only fire for object
files, not assembly which most of the llvm test suite uses.

This patch moves the code into the <Target>_MC::verifyInstructionPredicates
method, inside the InstrInfo.  The allows it to be called from other
places, such as in this patch where it is called from the
<Target>AsmPrinter::emitInstruction methods which should trigger for
both assembly and object files. It can also be called from other places
such as verifyInstruction, but that is not done here (it tends to catch
errors earlier, but in reality just shows all the mir tests that have
incorrect feature predicates). The interface was also simplified
slightly, moving computeAvailableFeatures into the function so that it
does not need to be called externally.

The ARM, AMDGPU (but not R600), AVR, Mips and X86 backends all currently
show errors in the test-suite, so have been disabled with FIXME
comments.

Recommitted with some fixes for the leftover MCII variables in release
builds.

Differential Revision: https://reviews.llvm.org/D129506